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1/12 june 2004 vn02nsp vn02npt high side smart powe r solid state relay rev. 2 table 1. general features output current (continuous): 6a @ t c =25c 5v logic level compatible input thermal shut-down under voltage shut-down open drain diagnostic output very low stand-by power dissipation description the vn02nsp/vn02npt are monolithic devices made using stmicroelectronics vipower technology, intended fo r driving resistive or inductive loads with one side grounded. built-in thermal shut-down protects the chip from over temperature and short circuit. the input control is 5v logic level compatible. the open drain diagnostic output indicates open circuit (no load) and over temperature status. figure 1. package table 2. order codes type v dss r ds(on) i out v cc vn02nsp vn02npt 60 v 0.4 ? 6 a 26 v 1 10 powerso-10? ppak package tube tape and reel powerso-10 vn02nsp vn02nsp13tr ppak vn02npt VN02NPT13TR
vn02nsp/vn02npt 2/12 figure 2. block diagram table 3. absolute maximum ratings symbol parameter value unit powerso-10 ppak v (br)dss drain-source breakdown voltage 60 v i out output current (cont.) 6 a i r reverse output current ?6 a i in input current 10 ma ? v cc reverse supply voltage ?4 v i stat status current 10 ma v esd electrostatic discharge (1.5 k ? , 100 pf) 2000 v p tot power dissipation at t c 25 c 58 46 w t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c
3/12 vn02nsp/vn02npt figure 3. connection diagrams figure 4. current and voltage conventions table 4. thermal data note: 1. when mounted using minimum recommended pad size on fr-4 board. symbol parameter value unit powerso-10 ppak r thj-case thermal resistance junction-case max 2.14 3.33 c/w r thj-amb thermal resistance junction-ambient (1) max 62.5 100 c/w
vn02nsp/vn02npt 4/12 electrical characteristics (v cc = 13 v; ?40 tj 125 c unless otherwise specified) table 5. power table 6. switching table 7. logic input note: 2. the v ih is internally clamped at 6v about. it is possible to connect this pin to an higher voltage via an external resistor calculated to not exceed 10 ma at the input pin. symbol parameter test conditions min. typ. max. unit v cc supply voltage 7 26 v r on on state resistance i out = 3 a i out = 3 a; t j = 25 c 0.8 0.4 ? ? i s supply current off state; t j 25 c on state 50 15 a ma symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time of output current i out = 3 a; resistive load input rise time < 0.1 s; t j = 25 c 10 s t r rise time of output current i out = 3 a; resistive load input rise time < 0.1 s; t j = 25 c 15 s t d(off) turn-off delay time of output current i out = 3 a; resistive load input rise time < 0.1 s; t j = 25 c 15 s t f fall time of output current i out = 3 a; resistive load input rise time < 0.1 s; t j = 25 c 6s (di/dt) on turn-on current slope i out = 3 a i out = i ov 0.5 2 a/s a/s (di/dt) off turn-off current slope i out = 3 a i out = i ov 2 4 a/s a/s symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.8 v v ih input high level voltage 2 note 2 v v i(hyst) input hysteresis voltage 0.5 v i in input current v in = 5 v 250 500 a v icl input clamp voltage i in = 10 ma i in = ?10 ma 6 ?0.7 v v
5/12 vn02nsp/vn02npt electrical characteristics (cont?d) table 8. protections and diagnostics note: 3. status determination > 100 ms after the switching edge. functional description the device has a diagnostic output which indicates open circuit (no load) and over temperature conditions. the output signals are processed by internal logic. to protect the device against short circuit and over-current condition, the thermal protection turns the integrated power mos off at a minimum junction temperature of 140 c. when the temperature returns to about 125 c the switch is automatically turned on again. in short circuit conditions the protection reacts with virtually no delay, the sensor being located in the region of the die where the heat is generated. protecting the device against reverse battery the simplest way to protect the device against a continuous reverse battery voltage (-26v) is to insert a schottky diode between pin 1 (gnd) and ground, as shown in the typical application circuit (figure 7). the consequences of the voltage drop across this diode are as follows: ? if the input is pulled to power gnd, a negative voltage of -v f is seen by the device. (v il , v ih thresholds and v stat are increased by v f with respect to power gnd). ? the undervoltage shutdown level is increased by v f . if there is no need for the control unit to handle external analog signals referred to the power gnd, the best approach is to connect the reference potential of the control unit to node (1) (see application circuit in figure 8), which becomes the common signal gnd for the whole control board. in this way no shift of v ih , v il and v stat takes place and no negative voltage appears on the input pin; this solution allows the use of a standard diode, with a breakdown voltage able to handle any iso normalized negative pulses that occurs in the automotive environment. symbol parameter test conditions min. typ. max. unit v stat (3) status voltage output low i stat = 1.6 ma 0.4 v v usd under voltage shut down 6.5 v v scl (3) status clamp voltage i stat = 10 ma i stat = ?10 ma 6 ?0.7 v v t sc switch-off time in short circuit condition at start- up r load < 10 m ?; tc = 25 c 1.5 5 ms i ov over current r load < 10 m ? ?40 t c 125 c 28 a i av average current in short circuit r load < 10 m ? ; tc = 85 c 0.9 a i ol open load current level 5 70 ma t tsd thermal shut-down temperature 140 c t r reset temperature 125 c
vn02nsp/vn02npt 6/12 table 9. truth table figure 5. waveforms figure 6. over current test circuit input output diagnostic normal operation l h l h h h open circuit (no load) h h l over-temperature h l l under-voltage x l h
7/12 vn02nsp/vn02npt figure 7. typical application circuit with a schottky diode for reverse supply protection figure 8. typical application circuit with separate signal ground
vn02nsp/vn02npt 8/12 figure 9. r ds(on) vs junction temperature figure 10. r ds(on) vs supply voltage figure 11. r ds(on) vs output current figure 12. input voltages vs junction temperature figure 13. output current derating figure 14. open load vs junction temperature
9/12 vn02nsp/vn02npt package mechanical table 10. powerso-10 mechanical data figure 15. powerso-10 package dimensions note: drawing is not to scale. symbol millimeters min typ max a3.35 3.65 a (*) 3.4 3.6 a1 0.00 0.10 b0.40 0.60 b (*) 0.37 0.53 c0.35 0.55 c (*) 0.23 0.32 d9.40 9.60 d1 7.40 7.60 e9.30 9.50 e2 7.20 7.60 e2 (*) 7.30 7.50 e4 5.90 6.10 e4 (*) 5.90 6.30 e1.27 f1.25 1.35 f (*) 1.20 1.40 h 13.80 14.40 h (*) 13.85 14.35 h0.50 l1.20 1.80 l (*) 0.80 1.10 a0o 8o (*) 2o 8o detail "a" plane seating l a1 f a1 h a d d1 = = = = e4 0.10 a c a b b detail "a" seating plane e2 10 1 eb he 0.25 p095a
vn02nsp/vn02npt 10/12 table 11. ppak mechanical data figure 16. ppak package dimensions note: drawing is not to scale. symbol millimeters min typ max a2.20 2.40 a1 0.90 1.10 a2 0.03 0.23 b0.40 0.60 b2 5.20 5.40 c0.45 0.60 c2 0.48 0.60 d1 5.1 d6.00 6.20 e6.40 6.60 e1 4.7 e1.27 g4.90 5.25 g1 2.38 2.70 h 9.35 10.10 l2 0.8 1.00 l4 0.60 1.00 r0.2 v2 0o 8o package weight gr. 0.3
11/12 vn02nsp/vn02npt revision history table 12. revision history date revision description of changes september-1997 1 first issue 18-june-2004 2 stylesheet update. no content change.
vn02nsp/vn02npt 12/12 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com

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